Electrical Specifications
| Nominal Frequency | 62.500MHz to 161.1328MHz Some frequencies within this range may not be available. |
| Frequency Tolerance/Stability | (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating Temperature Range, Supply Voltage Change, Output Load Change, First Year Aging at 25°C, Shock, and Vibration) ±100ppm Maximum ±50ppm Maximum ±25ppm Maximum ±20ppm Maximum |
| Operating Temperature Range | 0°C to +70°C -40°C to +85°C |
| Supply Voltage (VDD) | 3.3VDC ±5% |
| Input Current | 75mA Maximum |
| Output Voltage Logic High (VOH) | VDD-1.085VDC Minimum, 2.35VDC Typical, VDD-0.88VDC Maximum at -40°C to +85°C VDD-1.025VDC Minimum, 2.35VDC Typical, VDD-0.88VDC Maximum at 0°C to +70°C |
| Output Voltage Logic Low (VOL) | VDD-1.83VDC Minimum, 1.60VDC Typical, VDD-1.555VDC Maximum at -40°C to +85°C VDD-1.81VDC Minimum, 1.60VDC Typical, VDD-1.62VDC Maximum at 0°C to +70°C |
| Duty Cycle | Measured at 50% of waveform 50 ±5(%) |
| Rise Time/Fall Time | Measured at 20% to 80% of Waveform 300pSec Typical, 700pSec Maximum |
| Output Logic Type | LVPECL |
| Load Drive Capability | 50 Ohms into VDD-2.0VDC |
| Phase Noise | All Values are Typical -60dBc/Hz at 10Hz Offset, -95dBc/Hz at 100Hz Offset, -125dBc/Hz at 1kHz Offset, -143dBc/Hz at 10kHz Offset, -145dBc/Hz at 100kHz Offset, -145dBc/Hz at 1MHz Offset, -146dBc/Hz at 10MHz Offset |
| Logic Control / Additional Output | Tri-State and Complementary Output |
| Tri-State Input Voltage (Vih and Vil) | Vih of 70% of VDD Minimum or No Connect to Enable Output and Complementary Output, Vil of 30% of VDD Maximum to Disable High Impedance Output and Complementary Output |
| Standby Current | Without Load 30µA Maximum |
| RMS Phase Jitter | Fj=12kHz to 20MHz; Random 0.4pSec Typical, 1pSec Maximum |
| Storage Temperature Range | -55°C to +125°C |
| Start Up Time | 10mSec Maximum |
